The new 0.7 nm transistors are significantly smaller than those that feature in standard 2 nm semiconductor chips used in supercomputers, AI systems and advanced graphics processing units (GPUs). While size designation doesn't necessarily correlate with an exact measurement of the transistors on the chips, it does represent their general capabilities.
The new chip features transistors that are so diminutive they're not measured in nanometers but "angstroms," a unit of measurement typically reserved for atoms. The first of these chips is expected to be manufactured with transistors that are a mere 7 angstroms — equivalent to 0.7 nanometers or roughly the width of a glucose molecule.
The scientists achieved this feat using a novel technique called "nanostacking," which they first outlined in a study published as part of the peer-reviewed 2025 Symposium on VLSI Technology and Circuits and uploaded July 2025 to the IEEE Xplore server. This enables engineers to vertically stack the nanosheets used to build the previous generation of 2 nm computer chips.
Such problems have posed a challenge to attempts to shrink transistor size below 2 nm, and thus improve the performance and efficiency of computer chips beyond today's best capabilities. IBM's three-dimensional stacked architecture, however, aims to alleviate some of these pain points, the scientists said.
"What happens here is we actually stack the device. I call it stacking, but also staggering. Stacking in vertical direction, so the front side of each transistor and the backside of each transistor can be contacted independently for signal and power. The stacking of these transistors are done by single dielectric bonding, which is a key innovation that we have developed."
(Image credit: IBM)The scientists say the research could carry deep implications for the computing industry, with revolutionary impacts on the artificial intelligence (AI) and quantum computing sectors.
SRAM is also vital in AI processing because it's located close to processing cores (versus other kinds of RAM modules that are often separate components), increasing the speed of data shuttling around systems and therefore reducing bottlenecks.
The future of computing
"We actually have entered a domain that semiconductor manufacturing is almost magic," Huiming added about the design process. "Think about the structure we are building here. We actually deposit the layer atom by atom, and we actually layer atom by atom."
Shrinking the transistor nodes on these chips will allow for more powerful processes, they said, thanks to a near-twice jump in the transistor count, while the stacked and staggered design significantly reduces the energy requirements. Huiming said that while everybody demands performance, nobody wants to pay the bill for the power.
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These innovations could also have an impact on quantum computing, IBM representatives said, as they could lead to improvements in the classical systems with which quantum computers will work together as the technology emerges.
"For quantum computing, we need to use lots of classical compute with it," Jay Gambetta, IBM's director of research, said during the press conference. "We want to build decoders, we want to build controllers for decoders and accelerators. And we are working right now on that type of classical with the 2 nm [platform]. If we can continue to change the platform, use more efficient, more powerful [chipsets], it will only help the rate and pace at which we've got to build the classical compute that goes along with the quantum."
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